Plaits Normalization Probe


Longtime lurker, first time poster :slight_smile: My name is Tenkai, and I run Zetaohm. I released a sequencer last year named FLXS1, and I referenced mutable designs for so many things during the design process. So, thank you Olivier for your contributions! I was at Superbooth 2017, and hoped to meet you, but thats when you were sick and unable to attend.

Anywho, I wanted to ask about something I saw in the Plaits ADC input design. You have a “Normalization Probe” and I just wanted to verify with you what I assume is going on, and also have a question…

It appears that this circuit is designed to allow you to actively sense the connection of a cable into any of the ports by pinging the normalization input of all ADCs simultaneously (between ADC reads, I assume) with a 3v3 signal.

My question is:

With the 1n caps on some of the ADC inputs, and a .2ms settling time for a 3v3 ping, how are you able to achieve a 2khz DC input, and also check for normalization? I would assume that checking for normalization would require that a ping be sent, and one ADC sample would be lost.

The “normalization probe” signal is pseudo-random noise, generated at the same rate as the ADC sampling.

If ADC reads match the pseudo-random noise (no more than 2 mismatches in 32 consecutive reads), I know that no patch cable is inserted in the corresponding input.

Nothing happens “in-between” samples.

The ADC sample rate is 4kHz (250µs), and the 90% settling time of the 1-pole filter on the CV inputs (33kΩ, 1nF) is 76µs.


Ah, that makes sense! So you can simply use the same read operation to determine if the jack is connected or not. That is quite ingenious. Thank you for the explanation!

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This IS clever…

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Sorry to bump an old thread. I see you’re using RCC_AHBPeriphClockCmd in the implementation of the normalization probe driver. But I’m unable to determine how that factors into Ui::DetectNormalization().

I understand that it’s an STM specific peripheral. But is there a direction I could start looking in, to figure out how to implement a similar bus on my teensy based device? Furthermore, what would I even be looking for to understand how this may work outside of STM32?

This is such a clever design and I’m itching to understand more about it.

Thank you so much for all of the knowledge you’ve helped spread Émilie :slight_smile:

It has nothing to do with the normalization probe code itself – it justs starts the clock driving a group of GPIOs – without this, the GPIOs don’t work.

OH HOLY CRAP I GET IT NOW. THANK YOU. I had to re-re-read your first comment. TLDR is if the ADC mismatches the noise on the probe for a given sample, you track that in normalization_detection_mismatches_. This works because if the jack is plugged in… the connection breaks and the noise obviously won’t match the ADC input -_-

My god this really is clever.