It is sample based in a way, the sample rate is just an exact multiple of the pitch and is continuously variable because it’s driven by a VCO. So my current line of thinking is:
HFVCO four octaves higher than the note you want driving a counter or a bunch of chained dividers to derive squares at -1 octave to -4 octaves. That’s effectively a 5-bit counter, if I sent that straight to a simple DAC then I’d get a stepped ramp with 32 steps.
Instead what I do is send the 4 LSB (that is squares 0, -1, -2 and -3) to individual XOR gates and send the MSB (the -4 signal) to the other input on all of the XORs. This inverts the top half of the ramp to make a triangle that goes 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, a, b, c, d, e, f, f, e, d, c, b, a, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0. This is how plenty of old sound chips generate their triangle, the difference is that they were clocked by divisions of a master clock. If it was driven by a (HF)VCO, much fun could be had.
I realise that with divisions of a high enough master clock the pitch resolution issues would be negligible, but I would still get a certain satisfaction out of knowing that the pitch was constantly variable.